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| specification for lcd module model no. tm128128ccbw t 4 prepared by: date: checked by : date: verified by : date: approved by: date: tianma microelectronics co., ltd 9 h u
9 h u revision record date ref. page revision no. revision items check & approval 9 h u 1. general specifications: ' l v s o d \ w \ s h ) 6 7 1 ' l v s o d \ f r o r u ' l v s o d \ f r o r u % o x h % o d f n % d f n j u r x q g : k l w h 3 r o d u l ] h u p r g h 7 u d q v i o h f w l y h 3 r v l w l y h 9 l h z l q j $ q j o h ' u l y l q j 0 h w k r g ' x w \ % l d v / r j l f 9 r o w d j h 9 / & ' 2 s h u d w l q j 9 r o w d j h 9 % d f n o l j k w ( / & 2 1 7 5 2 / / ( 5 6 % ; 23 ; 1 ' d w d 7 u d q v i h u 6 ( 5 , $ / % l w v 3 d u d o o h o 2 s h u d w l q j 7 h p s h u d w x u h 6 w r u d j h 7 h p s h u d w x u h 2 x w o l q h ' l p h q v l r q v 5 h i h u w r r x w o l q h g u d z l q j r q w k h i l i w k v s d j h ' r w 0 d w u l [ ; ' r w v ' r w 6 l ] h ; p p ' r w 3 l w f k ; p p : h l j k w j $ s s u r [ & r o r u w r q h l v v o l j k w o \ f k d q j h g e \ w h p s h u d w x u h d q g g u l y l q j y r o w d j h & r o r u w r q h z l o o e h f k d q j h g e \ e d f n o l j k w 9 h u 3. lcd module part numbering system 7 0 & & % : 7 7 7 $ % : : , ' ( 7 ( 0 3 ( 5 $ 7 8 5 ( 5 $ 1 * ( % $ & . / , * + 7 7 < 3 ( % 7 5 $ 1 6 ) / ( & 7 , 9 ( ( / % $ & . / , * + 7 / & ' 7 < 3 ( & ) 6 7 1 3 2 6 , 7 , 9 ( 0 2 ' 8 / ( 6 ( 5 , ( 6 0 2 ' 8 / ( 7 < 3 ( ' , * , 7 6 , 1 ' , & $ 7 , 1 * & 2 / 8 0 1 6 ; 5 2 : 6 7 7 , $ 1 0 $ 0 0 2 ' 8 / ( 5/24 ver 1.0 4. circuit block diagram 9 h u 5. absolute maximum ratings , w h p 6 \ p e r o 0 l q 0 d [ 8 q l w 5 h p d u n 3 r z h u 6 x s s o \ 9 r o w d j h 9 ' ' 9 6 6 / & ' ' u l y l q j 9 r o w d j h 9 / & ' 9 2 s h u d w l q j 7 h p s h u d w x u h 5 d q j h 7 2 3 6 w r u d j h 7 h p s h u d w x u h 5 d q j h 7 6 7 1 r & r q g h q v d w l r q 7/24 ver 1.0 6. electrical specifications and instruction code 6.1 electrical characteristics item symbol min. typ. max. unit supply voltage (logic) v dd v ss 2.85 3.0 3.15 v supply voltage (lcd drive) v lcd - 12.3 - v high v ih ? v dd =3.0v ? 0.8v dd - v dd v input signal voltage low v il ? v dd =3.0v ? 0 - 0.2v dd v supply current (logic) (display character) i dd (v dd -v ss =3.0v) - - 500.0 ua supply current (led) i el - - 1.7 ma 9 h u , q w h u i d f h 6 l j q d o v 3 l q 1 r 6 \ p e r o / h y h o ' h v f u l s w l r q 1 & 1 2 6 l j q d o 3 6 + / 3 d u d o o h o 6 h u l d o g d w d l q s x w v h o h f w l q s x w 3 6 + / 0 l f u r s u r f h v v r u l q w h u i d f h v h o h f w l q s x w s l q 3 6 + 3 6 + v h u l h v s d u d o o h o p s x l q w h u i d f h 3 6 + 3 6 / v h u l h v s d u d o o h o p s x l q w h u i d f h 3 6 / 3 6 + s l q v s l p s x l q w h u i d f h 3 6 / 3 6 / s l q v s l p s x l q w h u i d f h & 6 % + / & k l s v h o h f w l q s x w s l q v ' d w d l q v w u x f w l r q , 2 l v h q d e o h g z k h q f v e l v / 5 ( 6 ( 7 % + / 5 h v h w l q s x w s l q z k h q u h v h w e l v / l q l w l d o l ] d w l r q l v h [ h f x w h g 5 6 + / 5 h j l v w h u v h o h f w l q s x w s l q v 5 6 + ' d u h g l v s o d \ g d w d 5 6 / ' d u h f r q w u r o g d w d 5 : b : 5 + / 5 h d g : u l w h h [ h f x w l r q f r q w u r o s l q ( b 5 ' + / 5 h d g : u l w h h [ h f x w l r q f r q w u r o s l q ' % + / ' d w d e l w ' % + / ' d w d e l w ' % + / ' d w d e l w ' % + / ' d w d e l w ' % + / ' d w d e l w ' % + / ' d w d e l w ' % + / ' d w d e l w ' % + / ' d w d e l w 9 ' ' 9 3 r z h u v x s s o \ 9 & , + / 9 r o w d j h f r q y h u w h u l q s x w y r o w d j h s l q 9 6 6 9 * u r x q g 9 h u 9 2 8 7 9 r o w d j h f r q y h u w h u l q s x w r x w s x w s l q & & d s d f l w r u s r v l w l y h f r q q h f w l r q s l q i r u y r o w d j h f r q y h u w h u & & d s d f l w r u s r v l w l y h f r q q h f w l r q s l q i r u y r o w d j h f r q y h u w h u & & d s d f l w r u q h j d w l y h f r q q h f w l r q s l q i r u y r o w d j h f r q y h u w h u & & d s d f l w r u s r v l w l y h f r q q h f w l r q s l q i r u y r o w d j h f r q y h u w h u & & d s d f l w r u s r v l w l y h f r q q h f w l r q s l q i r u y r o w d j h f r q y h u w h u & & d s d f l w r u q h j d w l y h f r q q h f w l r q s l q i r u y r o w d j h f r q y h u w h u & & d s d f l w r u s r v l w l y h f r q q h f w l r q s l q i r u y r o w d j h f r q y h u w h u 5 ( ) + / 6 h o h f w v w k h h [ w h u q d o y u h i y r o w d j h y l d w k h y h [ w s l q 5 ( ) + x v l q j w k h l q w h u q d o 9 5 ( ) 5 ( ) / x v l q j w k h h [ w h u q d o 9 5 ( ) 9 ( ; 7 + / ( [ w h u q d o o \ l q s x w u h i h u h q f h y r o w d j h i r u w k h l q w h u q d o y r o w d j h u h j x o d w r u l w l v y d o l g r q o \ z k h q 5 ( ) l v / : k h q x v l q j l q w h u q d o y r o w d j h u h j x o d w r u f r q q h f w w r 9 ' ' 9 v v r u r s h q w k l v s l q , 1 7 5 6 + / , q w h u q d o u h v l v w r u v h o h f w s l q 9 % l d v y r o w d j h 9 % l d v y r o w d j h 9 % l d v y r o w d j h 9 % l d v y r o w d j h 9 9 % l d v y r o w d j h 9 5 9 y r o w d j h d g m x v w p h q w s l q 2 6 & : k h q x v l q j l q w h u q d o f o r f n r v f l o o d w r u f r q q h f w d u h v l v w r u e h w z h h q 2 6 & d q g 9 ' ' 1 & 1 r 6 l j q d o 9 h u , q w h u i d f h 7 l p l q j & k d u w serial interface characteristics db7 (sid) db6 (sclk) rs csb t dhs t dss t whs 0.9v dd 0.1v dd t wls t cys t ahs t ass t chs t css figure 41. serial interface characteristics (v dd = 1.8v, ta = -40 ~ +85 c) item signal symbol condition min. max. unit serial clock cycle sclk high pulse width sclk low pulse width db6 (sclk) t cys t whs t wls 111 60 60 - - - ns address setup time address hold time rs t ass t ahs 60 60 - - ns data setup time data hold time db7 (sid) t dss t dhs 60 60 - - ns csb setup time csb hold time csb t css t chs 60 1/2 * t cys - - ns (v dd = 2.7v, ta = -40 ~ +85 c) item signal symbol condition min. max. unit serial clock cycle sclk high pulse width sclk low pulse width db6 (sclk) t cys t whs t wls 58.8 30 30 - - - ns address setup time address hold time rs t ass t ahs 30 30 - - ns data setup time data hold time db7 (sid) t dss t dhs 30 30 - - ns csb setup time csb hold time csb t css t chs 30 1/2 * t cys - - ns note: *1. the input signal rise time and fall time (tr, tf) is specified at 15 ns or less. 9 h u , q v w u x f w l r q f r g h instruction description table 17. instruction table : don t care instruction rs rw db7 db6 db5 db4 db3 db2 db1 db0 description read display data 1 1 read data read data from ddram write display data 1 0 write data write data into ddram read status 0 1 busy on res mf2 mf1 mf0 ds1 ds0 read the internal status icon control register on/off 0 0 1 0 10001 icon icon=0: icon disable (default) icon=1: icon enable & set the page address to 16 set page address 0 0 1 0 1 1 p3 p2 p1 p0 set page address set column address msb 0 0 0 0 0 1 0 y7 y6 y5 set column address msb set column address lsb 0 0 0 0 0 0 y4 y3 y2 y1 set column address lsb set modify-read 0 0 1 1 100000set modify-read mode reset modify-read 0 0 1 1 101110 release modify-read mode display on/off 001010111d d=0: display off d=1: display on 00010000 set initial display line register 00 s6 s5 s4 s3 s2 s1 s0 2-byte instruction to specify the initial display line to realize vertical scrolling 00010001 set initial com0 register 00 c6 c5 c4 c3 c2 c1 c0 2-byte instruction to specify the initial com0 to realize window scrolling 00010010 set partial di splay duty r atio 0 0 d7 d6 d5 d4 d3 d2 d1 d0 2-byte instruction to set partial display duty ratio 00010011 set n-line inversion 00 n4 n3 n2 n 1 n0 2-byte instruction to set n-line inversion register release n-line inversion 0 0 1 1 100100 release n-line inversion mode reverse display on/off 0 0 1 0 10011rev rev=0: normal display, rev=1: reverse display entire display on/off 0 0 1 0 10010eon eon=0: normal display. eon=1: entire display on 9 h u table 17. instruction table (continued) : don t care instruction rs rw db7 db6 db5 db4 db3 db2 db1 db0 description power control 0000101vcvrvf control power circuit operation select dc-dc step-up 00011001dc1dc0 select the step-up of the internal voltage converter select regulator resistor 0000100r2r1r0 select internal resistance ratio of the regulator resistor 0010000001 set electronic volume register 00 ev5 ev4 ev3 ev2 ev1 ev0 2-byte instruction to specify the reference voltage select lcd bias 0001010b2b1b0 select lcd bias shl select 001100shl com bi-directional selection shl=0: normal direction shl=1: reverse direction adc select 001010000adc seg bi-directional selection adc=0: normal direction adc=1: reverse direction oscillator on start 0010101011 start the built-in oscillator set power save mode 001010100p p=0: normal mode p=1: sleep mode release power s ave mode 0011100001 release power save mode reset 0011100010 initialize the internal functions 11101000 set data d irection & display data length(ddl) d7d6d5d4d3d2d1d0 2-byte instruction to specify the number of data bytes. (spi mode) nop 0011100011 no operation test instruction 001111 don't use this instruction. table 17. instruction table (continued) instruction rs rw db7 db6 db5 db4 db3 db2 db1 db0 description set frc and pwm mode 0 0 1 0 0 1 0 frc pwm1 pwm0 frc(1:3frc, 0:4frc) pwm1 pwm0 0 0 9pwm 0 1 9pwm 1 0 12pwm 1 1 15pwm 00100010 0 0 set white mode and 1 st /2 nd frame, set pulse width 0 0 wb3 wb2 wb1 wb0 wa3 wa2 wa1 wa0 set white mode and 1 st /2 nd frame 00100010 0 1 set white mode and 3 rd /4 th frame, set pulse width 0 0 wd3 wd2 wd1 wd0 wc3 wc2 wc1 wc0 set white mode and 3 rd /4 th frame 00100010 1 0 set light gray mode and 1 st /2 nd frame, set pulse width 0 0 lb3 lb2 lb1 lb0 la3 la2 la1 la0 set light gray mode and 1 st /2 nd frame 00100010 1 1 set light gray mode and 3 rd /4 th frame, set pulse width 0 0 ld3 ld2 ld1 ld0 lc3 lc2 lc1 lc0 set light gray mode and 3 rd /4 th frame 00100011 0 0 set dark gray mode and 1 st /2 nd frame, set pulse width 0 0 db3 db2 db1 db0 da3 da2 da1 da0 set dark gray mode and 1 st /2 nd frame 00100011 0 1 set dark gray mode and 3 rd /4 th frame, set pulse width 0 0 dd3 dd2 dd1 dd0 dc3 dc2 dc1 dc0 set dark gray mode and 3 rd /4 th frame 00100011 1 0 set black mode and 1 st /2 nd frame, set pulse width 0 0 bb3 bb2 bb1 bb0 ba3 ba2 ba1 ba0 set black mode and 1 st /2 nd frame 00100011 1 1 set black mode and 3 rd /4 th frame, set pulse width 0 0 bd3 bd2 bd1 bd0 bc3 bc2 bc1 bc0 set black mode and 3 rd /4 th frame |
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